Summit Microelectronics, Inc: Developer Support

Summit Microelectronics, Inc

Tech Support: Applications Note 42
Obtaining Optimum Performance with Summit's ADOC™/Marginer Family



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Obtaining Optimum Performance with Summit's ADOC™/Marginer Family

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Choosing the Reference Voltage

All of Summit's marginers contain an internal voltage reference of 1.25V nominal resulting in an overall accuracy of ±0.5%. Higher accuracies may be achieved by using an external reference with an accuracy of at ¾±0.2%. Further, the reference voltage is internally scaled by 4 times limiting the upper voltage that may be monitored or controlled to 5V for a 1.25V reference.

When using an external reference, a 1.25V nominal voltage results in the best overall accuracy using the factory default hex file program settings. Other popular voltage reference values may be used and are most accurate when factory trimmed for the exact value. When ordering samples, specify the nearest reference voltage being used (Table 1) to obtain the best possible accuracy. In production, the reference value is determined by the HEX file contents generated from the Windows GUI.

  

     1.

1.024V

2.

1.250V

     3.

2.048V

4.

2.500V

     5. 

3.000V     

6. 

3.300V      

Table 1: Voltage Reference Selection Guide

  
Although the voltage chosen for a certain application may not be present in Table 1, the breakpoints are chosen so that no degradation in accuracy is experienced when using unlisted values. Be certain to specify the voltage closest to the actual reference used.

Choosing the Internal Voltage Regulator Setting

With +12V Supply
The internal voltage regulator powers the marginer's logic and other functional blocks including the I2C communication bus. Select the internal voltage regulator (3.6V or 5.5V) so that the highest input voltage to be margined is less than or equal that chosen. For example, in a system margining a 5V supply, the internal regulator must be set to 5.5V. If the system uses a lower voltage (e.g., 3.3V) for the I2C communications a level shifter must be placed between the I2C master and the marginer clock and data lines to boost the voltage swing to 5V. If a 5V I2C bus is used the level shifter is not required.

Without +12V Supply
When a 12V supply is unavailable the marginer is powered from the VDD pin and the internal regulator is selected so the highest margined voltage is less than the internal regulator. For example, if the system's highest monitored/margined voltage is 5V, this supply is connected to both the VDD pin and to one of the VMX pins. Again the internal regulator is set either 5.5V because the 5V is being margined and is the highest voltage. If it were not being margined, it is permissible to set the internal regulator to 3.6V if the I2C bus is operating at this voltage, thereby preventing the need for a level shifter between the I2C master and the margining device.

TRIM_CAPX : Selection and Proper Placement

The TRIM_CAPX serves as the storage element for the ADOC operation and as such requires attention be paid to its maximum leakage and placement with respect to the margining device. The maximum allowable leakage from the TRIM_CAPX is:



Allowing for PCB and other leakage sources use 50nA as the maximum leakage allowed from the TRIM_CAPX node capacitor. For a circuit having an average voltage of 5V on the TRIM_CAPX capacitor, the maximum allowable leakage (IR) resistance of the capacitor is:



Many vendors offer an X7R type ceramic capacitor with adequate IR (insulation resistance) to be suitable for the ADOC TRIM_CAPX (see list below) for the 1µF value suggested. Be certain the ceramic capacitor chosen also meets or exceeds the IR requirements at elevated temperatures. A general rule to follow for this application is to use a capacitor with R-C product of 500 M‡-µF or higher.

Film capacitors do offer much higher IR ratings but at both a cost and space premium. These may be used as an alternative but are generally not required.

TRIM_CAPX : Recommended Suppliers:

Kemet: C0805C105K9RAC, 1µF, 0805, +-10%, 6.3V
http://www.kemet.com

AVX: 08056C105KAT4A, 1µF, 0805, +-10%, 6.3V
http://www.avxcorp.com

TDK p/n: C2012X7R1C105K, 1µF, 2012, +-10%, 16V
http://www.component.tdk.com

NIC Components Corporation: p/n
NMC0805X7R105K16TRP, 1µF, 0805, +-10%, 16V
http://www.niccomp.com



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SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user's specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission.

SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances.

Revision 1.0 - This document supersedes all previous versions. Please check the Summit Microelectronics, Inc. web site at
www.summitmicro.com for updates.
 
ADOC™ is a registered trademark of Summit Microelectronics Inc., I2C is a trademark of Philips Corporation.
 

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