Dual 10- Bit Non-Volatile DAC (SMP9210)

Precision control of the DC-DC converters' output voltages is used for voltage margin testing and minor adjustment as dictated by the layout of the printed circuit card and other factors relating to volume production of Telecom system cards. The SMP9210 Dual DACPOT provides a stable means of adjusting the converter output voltages while ridding the system of unreliable mechanical potentiometers.

Optional Opto-isolated I²C Interface

All programmable devices are easily accessed 'live' with the use of an optically isolated I²C interface. Low cost, low voltage opto-isolators maintain primary to secondary-side voltage and galvanic isolation permitting 'on the fly' communications with Summit's programmable integrated circuits. Communications may be established using a Summit supplied Dongle or the resident I²C serial bus. Alternatively, the devices can be programmed separately with a primary and secondary I²C Interface bus.

HOT-SWAP CONTROLLER SMH4804: (FIGURE 2)

Note: See the SMH4804 Data Sheet, AN21 and the SMH4804EV User's Guide for basic design information.

Nuisance Tripping Avoidance Tips

Although the SMH4804's programmable filter delay times are generally adequate to handle most overcurrent transients, a simple R-C filter placed across the current sense resistor prevents nuisance tripping in very harsh &endash;48V environments. Using a telecom-like printed circuit board, the values of R_F1 and C_F1 were determined empirically by switching in a separate &endash;48V feed (-48V_B) 10% higher in voltage than that already powering the board. The time constant is:

This time constant is in addition to that pre-programmed into the SMH4804 circuit breaker configuration registers. Another concern raised by board insertion or the addition or removal of a &endash;48V feed is the change in voltage experienced at the DRAIN SENSE pin of the SMH4804. This pin senses the drain voltage of the MOSFET during both the live-insertion and steady state intervals. An abrupt voltage increase on this pin causes the SMH4804 to immediately de-assert the PG# outputs and shutoff the MOSFET gate drive. Adding a small valued capacitor of 0.01uF-0.1uF from this pin directly to the VSS pins prevents nuisance tripping and unwarranted downtime without otherwise jeopardizing normal operation.

External Slew-Rate Limiting Component Selection

The parasitic capacitances, both static and dynamic of the N-Channel MOSFET require the addition of a few external components particularly when it is enhanced with a current source (100uA for the SMH48xx Family). When a card is live-inserted the SMH4804 VGATE output is high impedance until adequate voltage (>9V) is present on the VDD pin. This condition can allow the MOSFET to turn on if the bus produces enough gate voltage to exceed the threshold voltage of the MOSFET. This is prevented by adding 2 capacitors: one across the drain to gate terminal (C2), another across the gate to source terminal (C3). The resistor (R27) in series with C2 forms a negative feedback network with C2 to control the slew-rate current and total soft-start interval. Choose C2 to limit the inrush current during the soft-start interval:

Where:

C_Bulk is the total capacitance on the drain side the MOSFET (include that found in the DC-DC converters). I_VGATE is the nominal gate drive current from the VGATE pin (100uA).

I_Inrush is the maximum desired current passing through the MOSFET during the soft-start interval.

Note: The time required to charge the bulk capacitance is inversely proportional to the inrush current.

Choose C3 to prevent the MOSFET from turning on before the SMH4804 VGATE output becomes active:

Where:

V_IN(MAX) is the maximum bus input voltage.
V_GS(th) is obtained from the MOSFET data sheet.

Choose the maximum value of R27 that does not interfere with the soft-start action resulting from I_VGATE and C2:

Reducing R27 below 1k½ diminishes its usefulness for snubbing and damping abrupt voltage changes so prevalent in &endash;48V Telecom environments.

Application Note 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

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SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user's specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission.

SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances.

Version 2.0 - This document supersedes all previous versions.

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